Our algorithm-to-platform design flow is structured as depicted in Figure 2. First, the algorithm designer implements the DSP system using CoWare's Signal Processing Designer (SPD), formerly known as SPW. For that purpose, algorithmic blocks may be assembled using SPD's C-based library blocks or imported from MATLAB into SPD (among other approaches).
2. Proposed Algorithm to Platform Design Flow
After exploring the performance of the DSP system, including all fixed-point quantization effects, the algorithm designer will arrive at a reference model of the targeted DSP system. The algorithm designer now starts to partition the model working with the hardware and software designers. The resulting hardware-mapped sub-systems are used to generate platform component models in the form of SystemC modules. These platform component models can be inserted into a virtual hardware platform as DSP hardware accelerators. In CoWare's design flow, this is done using the Platform Architect environment.
Simulating and analyzing the virtual hardware platform provides information on the quality of the partitioning and the chosen hardware architectures. If the results are not optimal, the partitioning in SPD, the selection of interconnects and memory architectures, etc. can be iteratively improved in the Platform Architect environment.
Because the generation of the DSP hardware accelerator models is an automated process, short iteration cycles can be achieved. DSP peripheral blocks from SPD can be partitioned, configured and generated in under an hour. In contrast, writing, rewriting and verifying manually-written SystemC code can take several days and require expert knowledge of SystemC. Once the virtual hardware platform meets the design goals, the hardware designer and the embedded software developer can start from a known, golden specification. The hardware designer has a starting point for the RTL implementation of the platform. The embedded software developer receives a developing and debugging platform much earlier than in the traditional flow.