Developing applications for a wide range of mobile terminals can be a major headache for software engineers. System simulation now provides a way to develop and test software running on a virtual platform long before the hardware is available. Mark Snook explains.
This second of a five-part series shows how to optimize DSP "kernels," i.e., inner loops. It also shows how to write fast floating-point and fractional code.
Part one of this six-part series introduces the hardware used for debugging, the debugging challenges facing DSP programmers, and debugging methodologies.
dThis white paper will discuss Texas Instruments (TI) SmoothPicture technology.
A diamond grid Digital Micromirror Device (DMD) is coupled with an optical actuator to
produce smooth, film-like picture in a DLP technology-based rear projection display
system while revealing the entire resolution of the input image.
In the second in a six part series based on their book "Networks On Chips," Luca Benini and Giovanni De Micheli describe the architectural, programming and debug challenges of nextgen multicore networks-on-chips. This week: SoC objectives and NoC needs
A simple FFT, generated as hardware from C language, illustrates how quickly a software concept can be taken to hardware and how little you need to know about FPGAs to use them for application acceleration.
Which is better: a fixed-point DSP or a floating-point DSP? The answer may surprise you--and so may the reasons. This article shows how to make the right choice, using two $5 DSPs as examples.
In the first in a six part series based on their book "Networks On Chips," Luca Benini and Giovanni De Micheli describe the architectural, programming and debug challenges of nextgen multicore networks-on-chips. This week: Why on-chip networking?
