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As the advancement of single-core processors becomes hindered by physical limitations, the necessity for multi-core processors becomes crystal clear. Chips such as the Dual-Core AMD Opteron processor offer significant computing performance over equivalent single-core chips, yet produce no additional heat and don't require more power. The consolidated processing strength of multi cores is ideal for next-generation systems and opens up new possibilities for extreme performance mobile systems, such as those featuring NextCom's FleXtreme architecture.

But before we think about leading-edge computing solutions and new technologies, the theory behind dual-core processors starts in the history books and warrants a closer look.

In 1965, Gordon E. Moore predicted that the complexity of an integrated circuit (the number of transistors per square inch) would double every year for the next ten years. Over the next decade, the rate at which the integrated circuit developed matched his prediction. After 1975 he modified his statement, projecting that integrated circuit complexity would double approximately every 24 months. This became known as "Moore's Law."

Although there have been many different kinds of advances in computer technology, Moore's Law has, by most interpretations, held true to date. On a basic level, it has been accepted as an indication of the rapid evolution of computer technology, and served as a guidepost for integrated circuit manufacturers.

However, today the advancement of integrated circuits such as microprocessors is reaching physical limitations. As a chip's individual transistors become smaller and the number of transistors on the chip increases, current flow between those transistors can no longer be controlled predictably. The result is a dramatic increase in heat generation and power consumption. Currently, system maintenance, overheating and heat dissipation are significant concerns for computer users and IT staff in charge of managing multiple, ever-expanding numbers of servers and workstations in an enterprise environment.

Compounding the technical limitations of increasing microprocessor performance is the fact that companies are continually adding systems to current server infrastructures to accommodate the increasing amount of data being produced by today's applications. Management and administration expenses can increase with each additional upgrade or expansion. Furthermore, server functions are often not properly distributed. Companies often assign only one application to each server, or to assign more than the necessary resources for a certain task to allow "peak performance."

The solution for IT managers is to combat these costs by consolidating server and workstation resources. Management costs, power consumption, and space requirements can all be reduced by focusing resources into modern high-end systems which offer the same, and often greater, performance and capacity than older, bulkier systems, but within a smaller footprint. This can mean less hardware consuming less power and producing less heat.

Of course, as the demand for maximum computer performance and large scale data processing continues to climb so too will the demands on even the latest server and workstation hardware.

Today, multi-core processors, introduced in early 2005, offer a new solution to this dilemma and a giant leap forward for processing performance and system consolidation in x86 environments.

Advances in semiconductor manufacturing processes have allowed some chip makers to produce processor chips with two full execution cores, providing the computational capability of two CPUs on a single, nearly same-sized chip. These two processing cores can work independently for high-speed multi-tasking, or they can work together on multi-threaded applications to offer better performance than the fastest single-core chip on the market.

"The industry has been concerned for some time about the need to ramp performance of the microprocessor, but within very real physical constraints," said Dave Jessel, business development engineer for 64-bit embedded systems at AMD. "We've approached the problem in a couple of ways: First by addressing the bottlenecks and 32-bit only limitations of a legacy front-side bus architecture, and second, by making sure that the new AMD64 architecture has built-in capability for multi-core expansion."

AMD laid out its plans for multi-core technology several years ago, first presenting a well-defined strategy in 1999, along with the details of its upcoming new x86 microarchitecture.

In 2003, the company introduced the AMD Opteron processor family for both 32- and 64-bit computing on an x86-based computer. These powerful new processors were built from the ground up with future expansion (to multi-core processing) and transition (from 32- to 64-bit computing) in mind. For example, the AMD64 core of the AMD Opteron processor features simultaneous 32- and 64-bit computing with no degradation in performance, allowing companies currently using 32-bit systems and applications to continue working with their older applications as they upgrade to the more powerful 64-bit architecture for future business needs.

"Customers'--and by that we mean system designers, OEMs, and the ultimate users of the technology--have been talking to us for years about what they foresee as the barriers to achieving true next-generation technology," said Jessel. "It's important to note that AMD's innovations at the CPU level have stemmed from an understanding of the customer's concerns."

Complementary to the customer-oriented vision of providing both 32- and 64-bit computing capability, the AMD Opteron processor features Direct Connect Architecture, which dramatically increases data throughput via HyperTransport Technology and decreases latency with an integrated memory controller.

Historically, the core of a standard processor chip requires a link to an external bus (the traditional front-side bus) which, in turn, connects the processor to the I/O, to other processors and periphery chips, and to the main memory on the motherboard. Early dual-core chips have had to use the same type of bus, even when connecting one core to another on the same chip, resulting in performance penalties.

AMD's unique approach with Direct Connect Architecture has enhanced data transmission speed and eliminated the need for an external front side bus. With HyperTransport Technology--a high-bandwidth, low latency interconnect which links cores directly to the system memory, the I/O, and to each other--systems can utilize up to 24GB/s of peak bandwidth per processor in the form of three coherent HyperTransport links. Reduced bottlenecks between system components and processors make for more efficient use of current system resources and tomorrow's high-end components.

Continuing to improve performance, the AMD Opteron processor also features an integrated DDR Memory Controller, changing the way the processor accesses the main memory. Running at the same frequency as the processor, as it is directly on the processor die, the memory controller has the effect of increasing the bandwidth that is directly available to the processor, cutting down on memory latency. In a dual-core processor, each core has its own cache and shares an integrated memory controller. An integrated memory controller removes the need for data to go through a traditional front-side bus to get to system memory and further increases performance of the entire computing system.

The Dual-Core AMD Opteron processor is well suited to run large clusters, rack-mount and tower systems more efficiently. With the processing capability of two cores on one chip, server and workstation consolidation is made simple and gains benefit from the resulting reduced heat production and power consumption. Multiple large, heavy computer systems taking up shelf after shelf of rack space can now be replaced by more powerful systems that run with smaller, more efficient components.

The reduced space, weight, and power requirements of a system using technologies like dual-core mean more than just extra space in the server room and low cost of operation. The efficiency of this technology also opens up a new level of high-performance mobile computing and gives companies the flexibility to design more innovative solutions that directly address specific customer needs.

Measuring 11.1x16.6x5.6 inches and weighing only 17-23 pounds (depending on the configuration), the mobile FleXtreme AMD Opteron processor-based platform from NextCom allows for extreme computing any time, anywhere. Using technologies like the Dual-Core AMD Opteron processor and PCI Express, NextCom has placed the processing power of a rack-mount server, high-end workstation, and high-capacity storage unit in one rugged, easy-to-carry system that can be deployed anywhere. To suit a variety of computing needs, processor configurations available for the FleXtreme include a single single-core AMD Opteron processor, two single-core processors, or two dual-core processors--the equivalent of a 4P system.

From the beginning, AMD has worked with NextCom to build the FleXtreme architecture. This open-standards system is designed to maximize the benefits of single- and Dual-Core AMD Opteron processors for 64-bit computing, not just for portability, but also for maximum performance. This is achieved by supplying the platform with the fastest memory, I/O and expansion components available to accommodate high-speed data production and transfer.

"NextCom has taken enterprise data center-class performance and deployed it to the field," said Jessel. "The FleXtreme system, with two dual-core processors and leading-edge graphics and visualization capability in a compact form factor, represents a tremendous new capability for deploying mobile server and workstation computing."

Some of the advanced features of the FleXtreme architecture include high-capacity removable or fixed SATA hard disk drives, an on-board ATI Radeon Mobility graphics controller with dual-head support, multiple high-speed memory configurations (including up to 16GB buffered ECC DDRAM), multiple Gigabit Ethernet networking ports, and a multitude of connection options like Ultra160 SCSI, dual fiber channel, SATA ports and USB 2.0 ports. FleXtreme also features a PCI Express 16x port for transferring data to and from expansion cards at a rate of up to 8GB/s. All of these options and many more are available in a system the size of a briefcase.

The FleXtreme architecture, like AMD64 technology, is built to accommodate the user, not vice versa. Whereas AMD64 processors support both 32- and 64-bit computing for seamless upgrading and extended use of older applications, FleXtreme also supports a multitude of operating systems to match the customer's current interface. Supported operating systems include SuSe and Red Hat Enterprise Linux, Desktop Linux, Fedora Core Linux, Microsoft Windows 2003 Server, XP Pro, 2000 Pro, Solaris x86, Trusted Solaris x86, and Solaris 10 as well as multiple dual-boot configurations and Win-Ux concurrent use Linux and Windows.

"The FleXtreme, equipped with Dual-Core AMD Opteron processors, provides an un-paralleled computing resource in a mobile package," said Keith Fischbach, President of Padova Technologies. "This is truly an entry level enterprise server in a briefcase. The available breadth of operating systems running both 32- and 64-bit applications and the small versatile size further reinforce the Flex-ible premise of the FleXtreme product."

Currently, FleXtreme architecture is widely used through out many departments of the military and Homeland Security, where applications such as high speed data capture, analysis, and storage are necessary. In these markets, data communications need to be as close to real time as possible and hardware often requires the capability of running multi-threaded applications. Mobility is often a critical component for military data sharing. Field communications centers are set up in remote, and many times, harsh environments. The military has latched onto the capabilities of FleXtreme because it provides the processing power, server capabilities, and ruggedization necessary to fulfill all of these requirements.

Interestingly, these new advances in more flexible computing designs have come about, in large part, due to the limitations discussed under Moore's law. The heat production and power requirements of today's transistor-dense computer chips are impacting the further development of efficient or practical single-core processors and the pain data center managers experience in continually needing to increase computing capacity have led to the need for a next-generation solution.

It is an added bonus for technology consumers that a wealth of possible innovations, such as the server/workstation-on-the-go solution offered by NextCom's FleXtreme Architecture, are opening up as a result of addressing this issue.

Jonathan Hoysradt is a staff writer for NextCom. He can be contacted at jhoysradt@nextcomputing.com.

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