Sequential Programming: Like Eating Peas with a Straw.

Posted by Stephen Blair-chappell @ 09:29:AM | October 30, 2009

Before the era of multicore chips, performance gains in CPUs was achieved by a combination of ever increasing speed and architectural enhancements. This resulted in more and more power being consumed by the processor -- a situation that could not continue forever.

Something's cooking

I remember a tongue-in-cheek competition 'alternative uses of the Pentium' that came up with some entertaining suggestions. The winner suggested wiring four Pentiums together and using them as a cooker hob. Very amusing! 

The multicore race is here

Rather than making processor faster and faster, the received practice now is to get extra performance by multiple cores. Recently I read a news item that said a start-up company was proposing to make the first 100 core CPU -- claiming that they would 'pip Intel to the post.' So rather than the MHz race we had in the '80s and '90s, we are now entering the multicore race. It seems to be that the multicore era is here to stay -- so we'd better get used to the idea.   

Back in 2007, Intel announced to the public it's 80 core research chip. It made some  programmers wonder how on earth a program be written to take advantage of so many cores.  Writing for 2 or 4 cores seemed manageable, but 80 cores seemed unimaginable. 

Figure 1: Intel's 80 core research chip (circa 2007) .

Speed
GHz
Power
Watts
Perf.
Teraflops
3.16
62
1.01
5.1
175
1.63
5.7
265
1.81

Figure 2: Performance of the 80 core chip.

The performance of this 80 core chip is over 1 Teraflop.  Interestingly,  the first teraflop computer  ASCI Red was considerably bigger and was decommissioned in 2006.

Figure 3: ASCI Red, the first Teraflop computer. Try fitting this in your garage!

Software tools are the real challenge

The challenge for the programmer is how to write programs to take advantage of so many cores. Thankfully companies such as Intel (did I say I work for them ) are putting huge efforts and resources into enabling programming in parallelism.  The Intel Parallel Studio is an example of a tool suite that can be used to write parallel applications.  Its good that the semiconductor industry is taking a lead in developing software tools as well as silicon, otherwise programming for these newer devices would be something akin to eating peas with a straw -  entirely possible , but not very efficient.

 

This Week's Multicore Reading List
MATLAB and Google App Engine
Logging In C++ : Part 2
 Improving log granularity
A Conversation with BitMagic's Developer
Prefer Structured Lifetimes: Local, Nested, Bounded, Deterministic

All Feature Stories

Real World Parallelism Webinar Series

  • November 17, 2009
    Visual Effects for Animation - presented by DreamWorks Animation
    Speaker: Ron Henderson (Bio)

    Ron Henderson manages the FX Tools group at DreamWorks Animation, where he is responsible for developing physical simulation and procedural modeling tools. These systems have been used for key visual effects in recent films such as Kung Fu Panda and Monsters vs. Aliens (March 2009).

    Prior to joining DreamWorks in 2002 he was a senior scientist at Caltech with a joint appointment to the Applied Math and Aeronautics departments, where he worked on efficient techniques for the direct numerical simulation of fluid turbulence.

    Abstract:
    In this webinar, Ron Henderson will show examples of visual effects, from hair and feathers to smoke and fire, from a variety of DreamWorks Animation feature films. He will discuss in general terms the kinds of techniques used to achieve particular visual effects. Finally, Henderson will show a detailed breakdown of the dam-breaking scene from Madagascar: Escape 2 Africa, demonstrating how different elements of key frame animation, simulation, and rendering are combined in a real production shot.

  • December 1, 2009
    A Quick and Easy Way to Parallelize a Legacy Codebase with Intel® Threading Building Blocks (TBBs)
    Speaker: Bernard Laberge, Avid, Senior Principal Engineer (Bio)

    Bernard Laberge is a senior principal engineer in the video editors division at Avid. During his seven years with the company he has been actively involved in the replacement of the legacy video processing engines used by Avid editors with a common hardware-abstracted, component-based video processing engine currently running on the CPU with SIMD optimized code, GPU, and dedicated hardware.

    Abstract:
    Learn how to overcome the limitations of a thread-based scheduler, including dealing with the absence of recursive parallelism support and the inefficient handling of unbalanced processing load. Bernard Laberge addresses how Avid resolved the expensive refactoring of their thread-based scheduler into a task-based solution by choosing Intel® Threading Building Blocks (TBBs). He explores how Avid was able to easily integrate the Intel TBBs into their video editor applications and more than 5 million lines of code.

  • December 15, 2009
    How to Use Intel® Parallel Studio to Streamline Code Development in a Multicore Environment
    Speaker: Matt Dunbar, Director for Performance Technology, SIMULIA (Bio)

    Matt Dunbar is the director for performance technology at SIMULIA. Since joining the company in 1993, he has worked on parallelization of the Abaqus suite of products, initially for shared memory architectures and more recently for distributed memory architectures. Dunbar has also been intimately involved in selecting both the hardware and software tools used in the development of the Abaqus product line.

    Abstract:
    Resolve elusive, costly multithreading errors quickly and efficiently with Intel® Parallel Studio. While many coding problems that lead to bugs in software applications are typically straightforward logic errors, errors in managing memory and in multithreading code can sometimes take weeks to months to diagnose and fix. Matt Dunbar explores how and why taking advantage of multicore processors through multithreaded code is critical for compute-intensive applications. While spotlighting his work on SIMULIA's Abaqus finite element solver, Dunbar addresses the need for multicore execution and shares his experiences using Intel Parallel Studio to streamline code development in a multicore environment.