Blog Archives

April, 2009

If It Works -- Use It!

I recently spoke at the ACCU ("Association of C and C++ Users") Conference in the UK, with the title of my talk being "Seven Tips To Help Get You Started on Multicore".

Any Hope for the Sun Worshippers?

At Ctest Labs, we have (or had?) really big plans for the Sun Ultrasparc T2 and maybe Niagra 3. These are very nice boxes and fit our multicore needs just fine. But now that Oracle is acquiring Sun, what will become of the Ultrasparc T1, T2, and that whole line of multicore computers that had CMT?

Intel's Hyper-Threading Strikes Back

Intel's Hyper-Threading technology was introduced with the 3.06 GHz Pentium 4 microprocessor. A few years later, the new Intel Core i7 processors offer Hyper-Threading again.

Intel's Parallel (Near Term) Roadmap

In wrapping up this year's Intel Software Conference, James Reinders shared a sneak peek of what software developers can look forward to seeing from the company over the coming months, at least in terms of parallel programming tools.

A Shout Out to the Fifth Generation

Of course, the assumption is the answer is somewhere in the Cloud, right? We all know the Cloud has all the answers. But what if the Cloud doesn't have the answer?

Nehalem Benchmarks Make For Happy HPC

It's little surprise that attendees at this week's Intel HPC Summit in Salzburg, Austria, were more interested in benchmarks than your average group of developers. After all, benchmarking is all about the numbers, and HPC developers tend to be uber-number crunchers.

Cores Enough to Compel Parallel Programming

When will there be enough cores to make coding for concurrency worthwhile for you?

Java 7 Will Evolve to Fine-grained Parallelism

Java's development team understands the multicore revolution and is working hard in offering a new concurrency framework taking into account the new possibilities offered by the new microprocessors. Hence, JDK 7 (Java Development Kit 7) will offer the fork-join framework in order to help Java developers to tackle the multicore revolution using this popular programming language.

Requires Serious Attention ... Concurrently

Whether your problems are computationally intense or computationally large, maybe multicores can help manage the possible solutions. In guessing our 12-character code (three letter prefix and the 9 remaining characters of any arrangement of letters and digits, with replacement), we are dealing with a very large search space; an exhaustive search requiring 263 x 369 possibilities to consider. How could we interject parallelism into solving such a problem?

Accelerating Critical Sections

"Critical sections" are parts of the software for multicore architectures in which only one thread can execute at a given time, causing other threads needing access to shared data to wait for the current thread to complete the critical section.


Two Parallelism "Holy Grails"

A good parallel program has two qualities: (1) it works as intended, (2) it scales.

Novell's Mono Brings SIMD Support to C#

Parallel programming is not just about multi-threading and multi-core. There's also a lot of power in the SIMD (Single Instruction Multiple Data) extended instruction set available in most modern microprocessors from Intel and AMD.

Multicore Programming Summer School

The University of Illinois at Urbana-Champaign will be conducting a summer school about multicore programming June 22-26, 2009. I spoke with Marc Snir who is organizing the program. Prof. Snir is co-director of UIAC's Universal Parallel Computing Resource Center.

Larrabee's New Instructions In C++: A Prototype

So you've read the article and watched the video, and you're chomping at the bit to start playing around with Larrabee, Intel's multicore architecture that boasts many cores, many threads, and a new vector instruction set -- all in the name of pushing performance. You have everything you need except -- a Larrabee.

Calendar

June 2009
May 2009
April 2009
March 2009
February 2009
January 2009
December 2008

Real World Parallelism Webinar Series
  • November 17, 2009
    Visual Effects for Animation - presented by DreamWorks Animation
    Speaker: Ron Henderson (Bio)

    Ron Henderson manages the FX Tools group at DreamWorks Animation, where he is responsible for developing physical simulation and procedural modeling tools. These systems have been used for key visual effects in recent films such as Kung Fu Panda and Monsters vs. Aliens (March 2009).

    Prior to joining DreamWorks in 2002 he was a senior scientist at Caltech with a joint appointment to the Applied Math and Aeronautics departments, where he worked on efficient techniques for the direct numerical simulation of fluid turbulence.

    Abstract:
    In this webinar, Ron Henderson will show examples of visual effects, from hair and feathers to smoke and fire, from a variety of DreamWorks Animation feature films. He will discuss in general terms the kinds of techniques used to achieve particular visual effects. Finally, Henderson will show a detailed breakdown of the dam-breaking scene from Madagascar: Escape 2 Africa, demonstrating how different elements of key frame animation, simulation, and rendering are combined in a real production shot.

  • December 1, 2009
    A Quick and Easy Way to Parallelize a Legacy Codebase with Intel® Threading Building Blocks (TBBs)
    Speaker: Bernard Laberge, Avid, Senior Principal Engineer (Bio)

    Bernard Laberge is a senior principal engineer in the video editors division at Avid. During his seven years with the company he has been actively involved in the replacement of the legacy video processing engines used by Avid editors with a common hardware-abstracted, component-based video processing engine currently running on the CPU with SIMD optimized code, GPU, and dedicated hardware.

    Abstract:
    Learn how to overcome the limitations of a thread-based scheduler, including dealing with the absence of recursive parallelism support and the inefficient handling of unbalanced processing load. Bernard Laberge addresses how Avid resolved the expensive refactoring of their thread-based scheduler into a task-based solution by choosing Intel® Threading Building Blocks (TBBs). He explores how Avid was able to easily integrate the Intel TBBs into their video editor applications and more than 5 million lines of code.

  • December 15, 2009
    How to Use Intel® Parallel Studio to Streamline Code Development in a Multicore Environment
    Speaker: Matt Dunbar, Director for Performance Technology, SIMULIA (Bio)

    Matt Dunbar is the director for performance technology at SIMULIA. Since joining the company in 1993, he has worked on parallelization of the Abaqus suite of products, initially for shared memory architectures and more recently for distributed memory architectures. Dunbar has also been intimately involved in selecting both the hardware and software tools used in the development of the Abaqus product line.

    Abstract:
    Resolve elusive, costly multithreading errors quickly and efficiently with Intel® Parallel Studio. While many coding problems that lead to bugs in software applications are typically straightforward logic errors, errors in managing memory and in multithreading code can sometimes take weeks to months to diagnose and fix. Matt Dunbar explores how and why taking advantage of multicore processors through multithreaded code is critical for compute-intensive applications. While spotlighting his work on SIMULIA's Abaqus finite element solver, Dunbar addresses the need for multicore execution and shares his experiences using Intel Parallel Studio to streamline code development in a multicore environment.