April 26, 2006
Power Management for Mobile DevicesSoftware Techniques for Power Management
Digital processors use CMOS-based circuits; they consume power mainly during switching from logic true to false, or vice versa. The switching power is proportional to the clock frequency and the square of the supply voltage. Therefore, lowering clock frequencies or supply voltages reduces power consumption. The mechanism of changing voltage or frequency is commonly known as "dynamic voltage" or "frequency scaling."
Dynamic voltage scaling (DVS) has been widely deployed for microprocessors to achieve significant power savings. DVS in microprocessors exploit the variance in processor utilization, lowering the frequency (and voltage) when the processor is lightly loaded, and running at maximum frequency (and voltage) when the processor is heavily executing. Dynamic voltage and frequency scaling is increasingly being used to reduce the energy requirements of embedded and real-time applications by exploiting idle CPU resources, while still maintaining all application's real-time characteristics. Accurate prediction of task run-times is key to computing the frequencies and voltages that ensure that all tasks' real-time constraints are met.
Many software power management algorithms achieves design goal by implementing some form of voltage or frequency scaling in conjunction with hardware support.
Optimal embedded power savings result from an integrated software-management plan that controls system, CPU, and peripheral devices. Two standards-based approaches, Advanced Power Management (APM) and Advanced Configuration and Power Interface (ACPI), support power management in PCs but don't address the specific requirements of mobile devices.
Advanced Configuration and Power Interface (ACPI) was introduced for desktop and notebook PCs in 1997. ACPI puts the responsibility for power management on the operating system. The operating system is aware of new applications, and it has the data to make power-management decisions. Although ACPI targets desktops and notebooks, it makes a good model to follow when developing a software based power management system for embedded systems. With ACPI, software automatically controls the power to peripherals, and peripherals can also activate the processor. For example, receiving an incoming call with a modem powers the processor from standby mode in time to capture the data. This aggressive power management greatly increases battery life on portable embedded devices. ACPI defines a series of reduced-power states for the system, processor, and peripheral devices. When the system has been idle for a specified amount of time, the software enters system power-management, or sleep, states. The CPU does no work in any of the sleep states. The ACPI specification defines four levels of sleep states, each with increased power savings but requiring more time to resume. For example, if the software saves the contents of memory to disk in a level-four sleep state, the CPU takes several seconds to power up the disk and reload memory before resuming operation.
An ACPI-compliant CPU has three power-management, or "C," states that require little time for entry and exit. State C1, the halt instruction, requires almost no time for the CPU to restart. C2 and C3 consume less power but take longer to resume. Intel reports that a 233-MHz mobile Pentium II processor consumes 0.5W in state C2 and takes 10 msec to resume. The same processor uses 0.15W in state C3 but needs 65 msec to restart. The CPU can enter C states during the idle time between operator keystrokes to save considerable power. The ACPI specification also defines four "D" states that allow the operating system to manage the power consumption in devices and peripheral chips. The D states have different meanings, depending on the type of device. For example, a modem driver may specify D0 for full power, D2 for a 2-sec maximum restore time, and D3 for a 5-sec maximum restore time. Effective use of D states influences hardware design because peripheral power-down occurs at different times. 
Previous Page |
1 Introduction
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2 Silicon Techniques for Power Management
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3 Software Techniques for Power Management
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4 Unified Power Management Architecture
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5 Conclusion
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