Dr. Dobb's is part of the Informa Tech Division of Informa PLC

This site is operated by a business or businesses owned by Informa PLC and all copyright resides with them. Informa PLC's registered office is 5 Howick Place, London SW1P 1WG. Registered in England and Wales. Number 8860726.


Channels ▼
RSS

Design

Multi-core & Multi-threaded: A New Era in Computing


Antonio Gonzalez is the founding director of the Intel-UPC Barcelona Research Center.


A new era of computing is upon us and the key word is "multi." This new era is characterized by multi-core processors enabling single-die multiprocessing of multithreaded applications. Spurring the need for this new era are new workloads and usage models that put enormous demands on computing platforms at a time when processor performance is constrained by energy consumption and power dissipation.

Multi-core processors and multithreading are fundamental in helping attain this computing power. They let us capitalize on the thread-level parallelism necessary for achieving higher performance and power efficiency. Unfortunately, current tools and techniques aren't designed to maximize the parallelism in most programs at a time when we need software to start making this technological leap. Consequently, researchers are investigating compiler techniques and microarchitectures that can provide highly threaded code through the use of speculative threading. In this article, I examine one new threading model called "speculative threading" which has the potential for enormous processing gains with only a small increase in power requirements.

The Need for Speculative Threading

The microprocessor is on the verge of perhaps its most significant transformation since its creation. Intel's announcement in early 2005 of a microprocessor with two full processing cores ushered in this new era of computing. These dual-core processors--two execution units packaged in a single processor--are the first step in a massive transition to multi-core computing. Moreover, research is underway on architectures that could hold dozens or even hundreds of processors on a single die.

Continuous increases in transistor count will deliver higher performance in every new processor generation. Performance projections based on past growth point toward reaching processing speeds of one trillion instructions per second by 2010. To get there, the new era of computing must do some thorough rethinking of basic foundations such as process technology, architecture, and software.

Design Challenges and the Move to Multi-Core

One of today's major challenges is maximizing performance in a power and thermal envelope. The increasing activity density, together with leaking currents (even in their "off" state) from ever-more microscopic transistors, is a challenge for the entire industry. This is particularly true with mobile, battery-operated devices. Multi-core and multithreaded platforms figure to play a big role in driving power and thermal efficiency. Their ability to exploit thread-level parallelism makes them normally more power-efficient than counterparts exploiting instruction-level parallelism.

Additional challenges come from variation--the difference in characteristics of "identical" transistors side-by-side on a die. Quantum mechanical effects that were largely ignored in previous process technology generations have increasing influence at 45nm, 32nm, and beyond. This calls for new circuits and microarchitectures that can adapt to these variations.

Thread-level parallelism--the ability to simultaneously process multiple sequences of instructions or threads (parts of programs that can execute independently)--can dramatically improve overall performance. Each of these threads runs on one of the multiple hardware contexts available through multi-core and multithreaded designs. These designs enable performance increases through:

  • Continued advances in materials, basic transistor fabrication, circuit design, and core microarchitecture.
  • Expanding the number of execution units in processors and improving individual unit architecture.
  • Developing new parallelizing approaches.


Related Reading


More Insights






Currently we allow the following HTML tags in comments:

Single tags

These tags can be used alone and don't need an ending tag.

<br> Defines a single line break

<hr> Defines a horizontal line

Matching tags

These require an ending tag - e.g. <i>italic text</i>

<a> Defines an anchor

<b> Defines bold text

<big> Defines big text

<blockquote> Defines a long quotation

<caption> Defines a table caption

<cite> Defines a citation

<code> Defines computer code text

<em> Defines emphasized text

<fieldset> Defines a border around elements in a form

<h1> This is heading 1

<h2> This is heading 2

<h3> This is heading 3

<h4> This is heading 4

<h5> This is heading 5

<h6> This is heading 6

<i> Defines italic text

<p> Defines a paragraph

<pre> Defines preformatted text

<q> Defines a short quotation

<samp> Defines sample computer code text

<small> Defines small text

<span> Defines a section in a document

<s> Defines strikethrough text

<strike> Defines strikethrough text

<strong> Defines strong text

<sub> Defines subscripted text

<sup> Defines superscripted text

<u> Defines underlined text

Dr. Dobb's encourages readers to engage in spirited, healthy debate, including taking us to task. However, Dr. Dobb's moderates all comments posted to our site, and reserves the right to modify or remove any content that it determines to be derogatory, offensive, inflammatory, vulgar, irrelevant/off-topic, racist or obvious marketing or spam. Dr. Dobb's further reserves the right to disable the profile of any commenter participating in said activities.

 
Disqus Tips To upload an avatar photo, first complete your Disqus profile. | View the list of supported HTML tags you can use to style comments. | Please read our commenting policy.